Digital logic design using Verilog : coding and RTL synthesis
| Main Author: | Taraate, Vaibbhav |
|---|---|
| Edition: | Second edition. |
| Subjects: | |
| Online Access: |
http://library.unisel.edu.my/web/guest/mylibrary |
Internet
http://library.unisel.edu.my/web/guest/mylibraryElectronic resources
| Call Number: |
TK7868 L6 T37 2022 |
|---|
| Accession No | Item Category | SMD | Status | Notes |
|---|
| EBO0014608 | EBOOK | EBOOK | AVAILABLE |