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| LEADER |
00862cam a2200229 7i4500 |
| 001 |
0000059889 |
| 005 |
20210629090000.0 |
| 090 |
0 |
0 |
|a TK7872.L64
|b D84
|
| 100 |
1 |
|
|a Dueck, Robert K
|
| 245 |
1 |
0 |
|a Digital design with CPLD applications and VHDL
|c Robert K. Dueck.
|
| 300 |
|
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|a 1 online resource (837 pages):
|b illustrations, text file, PDF.
|
| 336 |
|
|
|a text
|2 rdacontent
|
| 337 |
|
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|a computer
|2 rdamedia
|
| 338 |
|
|
|a online resource
|2 rdacarrier
|
| 650 |
|
0 |
|a Logic design
|
| 650 |
|
0 |
|a Programmable logic devices --
|x Design and construction
|
| 650 |
|
0 |
|a Programmable array logic
|
| 655 |
|
0 |
|a Electronic books
|
| 856 |
4 |
2 |
|u http://library.unisel.edu.my/web/guest/mylibrary
|
| 997 |
|
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|a Engineering & Life Sciences, Faculty
|b Engineering, Department
|
| 998 |
|
|
|a Electrical & Electronic Engineering, Diploma
|
| 999 |
|
|
|a EBO0005506
|b BOK
|c EBOOK
|e Electronic resources
|