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00841cam a2200205 7i4500 |
| 001 |
0000023786 |
| 005 |
20180314090000.0 |
| 008 |
080827 eng |
| 090 |
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|a TK454
|b .S65 2007
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| 100 |
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|a Sharifah Qistina Syed Aadnan
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| 245 |
1 |
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|a Six-pulses converter circuit analysis for HVDC using Matlab/Simulink
|c Sharifah Qistina bt. Syed Aadnan.
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| 260 |
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|a Bestari Jaya, Selangor:
|b UNISEL,
|c 2007.
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| 300 |
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|a xii, 70 p.:
|b ill. (some col.);
|c 30 cm.
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| 500 |
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|a Please login MyLib (library.unisel.edu.my/web/guest/mylibrary - click eDocument)
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| 502 |
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|a Electrical Engineering, Bachelor, UNISEL, 2007
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| 610 |
2 |
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|a Universiti Industri Selangor
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| 650 |
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|a Dissertation, Academic
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| 650 |
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|a Electric circuit
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| 650 |
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|a Electric circuit analysis
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| 999 |
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|a THE0000472
|b THESIS
|c THESIS
|e Thesis Room, Bestari Jaya
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