VHDL : analysis and modeling of digital systems
by: Navabi, Zainalabedin
Published: (1998)
Verilog digital system design : RT level synthesis, testbench and verification
Main Author: | Navabi, Zainalabedin |
---|---|
Language: | English |
Published: |
New York:
McGraw-Hill,
2006.
|
Edition: | 2nd ed. |
Subjects: | |
Online Access: |
http://library.unisel.edu.my/web/guest/mylibrary |
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