Verilog digital system design : RT level synthesis, testbench and verification

Main Author: Navabi, Zainalabedin
Language: English
Published: New York: McGraw-Hill, 2006.
Edition: 2nd ed.
Subjects:
Online Access: http://library.unisel.edu.my/web/guest/mylibrary
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100 1 |a Navabi, Zainalabedin  
245 1 0 |a Verilog digital system design :   |b RT level synthesis, testbench and verification   |c Zainalabedin Navabi. 
250 |a 2nd ed. 
260 |a New York:   |b McGraw-Hill,   |c 2006. 
300 |a xvi, 384 p.:   |b ill.;   |c 24 cm.. 
501 |a With CD-ROM : Verilog digital systems design / Navabi 
504 |a Includes bibliographical references and index 
650 0 0 |a Electronic digital computers --   |x Computer-aided design  
650 0 0 |a Verilog (Computer hardware description language)  
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