APA Citation

Navabi, Z. (2006). Verilog digital system design: RT level synthesis, testbench and verification (2nd ed.). New York: McGraw-Hill.

Chicago Style Citation

Navabi, Zainalabedin. Verilog Digital System Design: RT Level Synthesis, Testbench and Verification. 2nd ed. New York: McGraw-Hill, 2006.

MLA Citation

Navabi, Zainalabedin. Verilog Digital System Design: RT Level Synthesis, Testbench and Verification. 2nd ed. New York: McGraw-Hill, 2006.

Warning: These citations may not always be 100% accurate.